FPGA Implementation of a Trained Neural Network
Iosr Journals, Seema Singh, Shreyashree Sanjeevi, V, Suma, Akhil Talashi V · Figshare · 2015
This work presents the implementation of a trained Artificial Neural Network (ANN) for a certain application. A Multi Layer Perceptron (MLP) has been synthesized and implemented on Spartan3 FPGA. The weight matrices and bias has been provided by separate simulation software like MATLAB/Simulink. The implemented network has been verified in Xilinx ISE using Verilog programming language. The device utilization summary illustrates that the implemented perceptron utilizes few slices on FPGA which makes it suitable for large scale implementation. The implementation of FPGA based neural network is verified for a specific application. Keywords- Artificial Neural Network, FPGA implementation, Multilayer Perceptron(MLP), Verilog.