A Hardware Realization of a Decomposition Algorithm
Richard Dean Garton · Defense Technical Information Center (DTIC) · 1971
An algorithm proposed by Curtis to find circuit realizations based on Ashenhurst's decomposition theory is reviewed. Two tasks used repeatedly by the algorithm are discovered which may be accomplished more efficiently by a hardware approach than by a programming approach. Suggested hardware implementations of these tasks is discussed in detail. The approximate cost of building the hardware is obtained and the expected increase in speed is discussed. (Author)