Dynamic Program Stirring on Multiple Cores: How Hardware Performance Monitors Can Help Regulate Performance, Power, and Temperature Simultaneously
Matthew Curtis-Maury, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos · 2006
The utility of hardware performance monitors stems from the insight they provide into the interaction between software and hardware. It is this interaction that determines many interesting properties of an application’s execution. Among these properties, of primary interest to our research are the IPC, as it determines the performance of an application; the instantaneous power consumption; and the temperature of various processor resources. In particular, we are interested in how these properties scale with the number, configuration, and frequency scale of execution cores on multicore platforms. Previous work has shown the potential for accurate prediction of power [3], performance and scalability on multiple cores [2], and temperature [1] using HPMs. We have focused on making predictions of the performance of a parallel application on a varying number of processors, processors cores, and core-level hardware threads. We exploit the iterative nature of parallel programs by recording event counts during an initial iteration of each program phase on a specific hardware configuration. We then make predictions by multiplying the event counts by coefficients that have been derived offline using regression. Two hurdles to accurate prediction are finding an effective performance model and selecting the correct sets of events. We have found effective solutions to these issues that allow for prediction accuracy approaching 90%.