Modification of retinex algorithm and its stream implementation on FPGA
Dmitry I. Ustukov, Yevgeniy R. Muratov, Vladimir N. Lantsov · 2017
The article describes the modification of multi scale Retinex algorithm. The modification offers to use alternative method of image blurring instead of Gaussian filter, tabular value substitution instead of calculating logarithm values and some other approaches leading to the increase of algorithm performance. The peculiarities of combining algorithms in the method offered allow to implement modified algorithm on FPGA XILINX XC7VX485T as threading conveyor. The article tries to assess the performance of the algorithm on FPGA, as well as its block implementation on CPU in comparison with original version - Multi Scale Retinex. The increase of the number of blurring scales in the offered threading implementation on FPGA allows to increase the quality of the result due to small increase of FPGA chip resources.