DPA Resistance of Cryptographic Circuits Considering Temperature and Process Variations
Aditi Vijaykumar · OhioLink ETD Center (Ohio Library and Information Network) · 2012
Integrated circuits are used for many applications including cryptographic systems.Differential Power Analysis (DPA) attacks are gaining prominence as a threat to information security of cryptographic devices.DPA attacks exploit the data dependency of power dissipated in a cryptographic system, using statistical methods that correlate and rank a set of keys to the power dissipation of the device based on the input data being encrypted.The ease of a DPA attack is determined by the number of input data encryptions and corresponding device power measurements that are required to retrieve the key with statistical confidence.A typical attack measures the correlation between model power traces generated during encryption of some input data using various guess keys, and device power traces obtained by encrypting the same input data with the unknown correct key.Potential keys are rated using this correlation metric.The correlation metric and the number of traces depend on the variance of power values for a fixed cryptographic operation across many encryption power traces.The variance in turn depends on various factors such as process, voltage and temperature variations.This thesis explores the effect of temperature and process variations on the ease of Differential Power Attacks on SPICE implementations of two cryptographic algorithms, namely KEELOQ and a single S-BOX of DES.Exhaustive SPICE simulations are performed in Synopsys HSPICE R and Synopsys Nanosim R to determine a pattern in variance of power with respect to temperature and process variations during the encryption phase, with and without secure logic styles.Attacks are performed on these implementations using the SCARF [1] and DPA Attack Flow [2] ii