Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware
Zhaoshi Li, Leibo Liu, Yangdong Steve Deng, Shouyi Yin, Yao Wang, Shaojun Wei · 2017
CPU-FPGA heterogeneous platforms offer a promising solution for high-performance and energy-efficient computing systems by providing specialized accelerators with post-silicon reconfigurability. To unleash the power of FPGA, however, the programmability gap has to be filled so that applications specified in high-level programming languages can be efficiently mapped and scheduled on FPGA. The above problem is even more challenging for irregular applications, in which the execution dependency can only be determined at run time. Thus over-serialized accelerators are generated from existing works that rely on compile time analysis to schedule the computation.