Vlsi design of low power data encoding techniques for network-on-chip
G. Sravya, M. Sailaja · 2016
As technology improves, the power dissipated by the links of a network-on-chip (NoC) starts to contend with the power dissipated by the additional elements of the correspond ion subsystem, namely, the routers and the network interfaces (NIs). Here, we present a set of data encoding schemes to diminish the power dissipated by the links of an NoC. In this paper, the encoder in LDPC is replaced with our data encoding schemes in order to reduce the power consumption in Low Density Parity Check Techniques. Experiments carried out on both synthetic and real traffic scenarios show the effectiveness of the proposed schemes.