FPGA implementation of IPsec protocol suite for multigigabit networks
Mateusz Korona, Krzysztof Skowron, Mateusz Trzepiński, Mariusz Rawski · 2017
IPsec is a suite of protocols that adds security to communications at the IP level. However, the high computing power required by the IPsec algorithms limits network connection performance. The paper presents the hardware implementation of IPsec gateway in FPGA. Efficiency of the proposed solution allows to use it in networks with data rates of several Gbit/s.