A Requests Bundling DRAM Controller for Mixed-Criticality Systems
Danlu Guo, Rodolfo Pellizzoni · 2017
We design a novel DRAM controller that bundles and executes memory requests of hard real-time applications in consecutive rounds based on their type to reduce read/write switching delay. At the same time, our controller provides a configurable, guaranteed bandwidth for soft real-time requests. We show that there is a fundamental trade-off between the latency guarantee for hard real-time requests and the bandwidth provided to soft requests. Finally, we compare our approach analytically and experimentally with the current state-of-the-art real-time memory controller for single-rank DRAM devices, which applies type reordering at the level of DRAM commands rather than requests. Our evaluation shows that for tasks exhibiting average row hit ratios, or for which computing a row hit guarantee might be difficult, our controller provides both smaller guaranteed latency and larger bandwidth.