Flash gate optimized process and integration for electrical performances requirement on advanced embedded memory
El Amine Agharben, Marco Bileci, Agnès Roussy, Marc Bocquet · 2016
In this paper a correlation between specific inline and electrical parameters related to erase threshold voltage has been deeply investigated. This study shows the impact of the WL roughness on a NOR flash memory performances. A process recipe optimization and Run to Run feed-forward controller have been evaluated to keep the process in control.