ARMv8-A next-generation vector architecture for HPC
Nigel Stephens · 2016
Presents a collection of slides covering the following topics: ARMv8 vector processing; scalable vector extension; SVE architectural state; vector loop control flow; SVE instruction set; restricted encoding; VL-agnostic (VLA) approach; vector partitioning; speculative first-fault loads; FFR; loop carried dependencies: and SVE scalar subloops.