An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs
Xiaodong Xu, Qi Xu, Jinglei Huang, Song Chen · 2017
This paper proposes an integrated optimization framework for task partitioning, scheduling, and floorplanning on partially dynamically reconfigurable FPGAs. In the framework, three problems are represented by a partitioned sequence triple (PS, MS, RS), where (PS, MS) is a hybrid nested sequence pair for floorplanning and RS is a reconfiguration sequence for scheduling. The floorplan and schedule of tasks can be computed from the sequence triple in O(n^2) time. To integrate the exploration of the scheduling and floorplanning design space, a fast perturbation method is elaborated with a simulated annealing-based search engine, where a randomly chosen task is removed from the sequence triple and then inserted back into a proper position selected from all the n^3 possible combinations of partitions, schedule and floorplan. The experimental results demonstrate the efficiency and effectiveness of the proposed framework.