A Platform to Analyze DDR3 DRAM’s Power and Retention Time
Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn · IEEE Design and Test · 2017
The authors explore the intrinsic trade-off in a DRAM between the power consumption (due to refresh) and the reliability. Their unique platform allows tailoring to the design constraints depending on whether power consumption, performance or reliability has the highest design priority.