PROTECTING DATA WITH FAULT CORRECTION SCRIPTS
Esarajula Anilkumar, S. Mahesh Reddy, P. Suresh Kumar · IJITR International Journal of Innovative Technology and Research - IJITR International Journal of Innovative Technology and Research · 2016
A brand new architecture for matching the information protected by having an error-fixing code (ECC) is presented within this brief to lessen latency and complexity. Lately, however, triggered the attraction of increasingly more attentions in the academic field In line with the proven fact that the code word of the ECC is generally symbolized inside a systematic form composed from the raw data and also the parity information produced by encoding, the suggested architecture parallelizes the comparison from the data which from the parity information. To help lessen the latency and complexity, additionally, a brand new butterfly-created weight accumulator (BWA) is suggested for that efficient computation from the Hamming distance. Grounded around the BWA, the suggested architecture examines if the incoming data matches the stored data if your certain quantity of erroneous bits are remedied. For any (40, 33) code, the suggested architecture cuts down on the latency and also the hardware complexity by 32% and 9%, correspondingly, in comparison most abundant in recent implementation. Within the SA-based architecture, the comparison of two code words is invoked following the incoming tag is encoded. Therefore, the critical path includes a number of the encoding and also the n-bit comparison.