Traffic Allocation: An efficient adaptive network-on-chip routing algorithm design
Nan Wang, Pedro Valencia · 2016
In recent years, system-on-chip designs have migrated from fairly simple single processor and memory designs to relatively complicated systems with higher communication requirements. Network-on-chip architectures emerged as promising solutions for future system-on-chip communication architecture designs. However, the switching and routing algorithm design of network-on-chip communication architectures are still facing great challenges. To address the deficiencies of the existing routing algorithms, a new adaptive network-on-chip routing algorithm: Traffic Allocation routing algorithm is proposed in this paper. The specifics of Traffic Allocation routing as well as the simulation results and analysis are also presented. For the proposed algorithm, traffic allocation registers are added to each of the routers to keep track of communication traffic loads for the four outgoing directions. Instead of monitoring the buffer depth of the neighboring routers, the proposed Traffic Allocation routing measures traffic loads based on local computation so as to reduce extra communication overhead. Simulation of the proposed Traffic Allocation routing algorithm and three existing routing algorithms has been carried out on NIRGAM network-on-chip simulator. Simulation results illustrate that the performance of the Traffic Allocation routing algorithm matches or exceeds the performance of the existing routing algorithms.