A Matlab/Simulink Simulation Approach for Early Field-Programmable Gate Array Hardware Evaluation
Celso Coslop Barbante, José Gerardo Beserra de Oliveira · 2013
Abstract — This paper presents a Matlab test bench development for Field-Programmable Gate Array hardware simulation. When a design uses hardware blocks provided by third-part vendors (known as Integration Packages- IP), several options can be set in the block configuration page, inside vendor tool, and affect how the block behaves. These configuration options should be evaluated for any integration package one may be interested in and the test bench proposed facilitates the evaluation of any block-specific configuration parameters, enabling a three times reduction of block configuration time. Keywords-Model verification; Matlab; FPGA design. I.