Massively Parallel Systolic Processors for High-Speed Recognition of Simple Patterns
Reinhard Männer, Joachim Gläß, Frank Klefenz · 1991
This paper describes two systolic array processors, which have been designed for high-speed pattern recognition. Both operate on pixel images and execute the recognition process within 5 µs to 20 µs. The patterns which are recognized are simple geometrical figures, namely ill-defined circles and lines of a certain curvature. Both processors consists of one processing element (PE) per pixel. In the first one 28,160 PEs operate on a 176×160 image. It is assembled of 22×20 custom VLSI chips containing 8×8 PEs each. The processor is operation at CERN, Geneva, since spring 1991. The second processor finds and counts in an image all circle segments with a common vertex point within 10 µs. It is based on a Hough transform that maps the images polar coordinates onto the coordinates radius of curvature and starting angle of a track, and on the Euler relation. The systolic array executing the Hough transform is composed of sixteen X3090 chips (Xilinx). The Euler processor has been mapped into a ...