A SIMPLE VLSI CONNECTIONIST ARCHITECTURE
John G. Cleary · Libraries and Cultural Resources (University of Calgary) · 1987
A connectionist architecture based on a VLSI chip, the $sum$-chip, is described. In it single bit values are communicated between units by heavily multiplexing them. Individual units perform a weighted sum of their inputs and compare the result to a threshold in order to compute the (single bit) output. Potential applications, including rule based reasoning, constraint satisfaction, picture processing, and the game of life are briefly described and their space and time requirements analyzed.