FPGA implementation of hash key based stream cipher using NFSR and its security aspects
K. K. Soundra Pandian, Kailash Chandra Ray · 2016
In the last few decades, hardware-based embedded system incorporated with millions of logic gates; memory of megabytes size; high-speed processor and transceivers used for numerous applications such as industrial control, signal processing, communication infrastructure, etc. As the application data are massive and complex, it needs to be secured from adversary attack. In this context, a dynamic hash key based integrated RC4 stream cipher with the hash function using nonlinear feedback shift register (NFSR) is proposed in this paper. Unlike the existing stream ciphers, the novelty of this proposed hash-based stream cipher algorithm is to generate a dynamic key using NFSR. The proposed algorithm is coded using Verilog HDL to produce dynamic binary key stream and implemented on commercially available FPGA device Virtex 5 xc5vlx110t-2ff1136. The implementation result in the FPGA device achieves the data throughput of 482 Mbps, operates at a maximum clock frequency of 60.31 MHz and it is improved in terms of efficiency (throughput/area) compared to existing techniques. This paper briefs the cryptanalysis of proposed hash key based stream cipher using NFSR is against the adversary attack on a hardware platform for the hardware cryptography applications.