Exploring BDDs to reduce test pattern set
Gabriel S. Porto, Paulo F. Butzen, Denis Teixeira Franco · 2017
The improvement in Integrated Circuits density increases the fault occurrence probability. To ensure proper operation of critical systems, circuits testing becomes a task of extreme importance. Over the years, several methods have been proposed to optimize ATPGs (Automatic Test Pattern Generation). The optimization in test pattern generation aims to reduce the set of test vectors to be applied to circuits. Several techniques explore the concept of equivalent faults (Fault Collapsing). BDDs (Binary Decision Diagram) are one of the data structures explored to solve the problem. With a low capacity to handle large circuits, many extensions and modifications in BDDs have been proposed in the literature. This work aims to review Fault Collapsing concepts and investigate the efficiency of the BDDs proposed in the literature. A case study is done to compare classic techniques with BDDs extensions.