FPGA Based Implementation of AES Encryption and Decryption with Low Power Multiplexer LUT Based S-Box
T. K. Ratheesh, Seena Narayanan · IOSR Journal of Electronics and Communication Engineering · 2017
Encryption is important to keep the confidentiality of data.There are many of encryption algorithms to ensure the data, but should be the select the algorithm depended on the fast, strong and implementation.For that choose the advance encryption standard (AES) algorithm for encryption data because speed and easy implementation on small devices and some the feature for it.In this paper, implementation of encryption and decryption of AES algorithm is presented with a High Secured Low Power Multiplexer Look-Up-Table ( MLUT) based Substitution-Box (S-Box) . The main feature in the proposed MLUT based S-Box is that, it is implemented based on 256-byte to 1-byte multiplexer with a 256-byte memory instead of the conventional implementation of employing multiplication inversion in GF(2 8 ) and affine transformation. Thus, the proposed S-Box is simpler in circuit implementation and lower in power dissipation.