Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers
Ahmed El-Yamany, Sameh El-Ashry, Khaled Salah · 2016
Memory controllers are stated as the backbone of diverse architectures in the ASIC world. Among many concerns in enhancing the performance of the memory controllers is the tremendous verification process that consumes time, effort and resources. This paper proposes an optimized generic universal verification methodology (UVM) architecture to verify the flash memory controllers. The architecture built is based on a survey about the main flash memory controllers architecture types including Flex-*ne NAND, *pen NAND Flash Interface (*NFI), Embedded Multi-Media Card (e.MMC), Universal Flash Storage (UFS) and the SD-CARD memory controller examined with -open source wishbone(WB) interface-. Introducing an optimized solution for most of memory controllers verification environments is a great challenge owing to the harshness in building and reusing resources, the numerous protocols that the verifier should be aware of and the high number of iterations to reach full functional coverage. The generic environment offers several advantages, especially regarding the number of tests and sequences developed to achieve full coverage. The generic environment also provides the versatility of using pre-developed UVM architectures that eventually contribute in achieving much less developing time for the whole design process. Throughout the architecture, we will be using new techniques and state-of-the-art developed blocks to achieve the highest coverage closure time as well as an innovative way to build a reference model and how to efficiently utilize and accelerate the scoreboard checking process.