GAMA32 processor modeling using SystemC
Agus Bejo, Arief Darmawan, Addin Suwastono · 2016
Nowadays, the demand of embedded processors has been increasing rapidly. However, the design time required for producing a new processor can not catch up the time-to-market demand. In order to solve this problem, a modeling tool which allows designer to crate new hardware and estimate its performance without having the physical products is very important. SystemC is one among existing modeling tools which is widely used for designing hardware. Using SystemC, a processor architecture can be modelled and simulated quickly to speed up the architecture exploration time. In this paper, a new processor architecture called GAMA32 is designed and modelled using SystemC. GAMA32 is a 32-bit RISC processor architecture which is modelled in instruction accurate. It contains 45 instructions consisting of standard GPP instruction-set. For simulation, two memories RAM and ROM are also modelled. These memories are necessary to store program code and data code respectively. Both RAM and ROM are directly connected to the GAMA32 processor. Simulation results show that all instructions can be executed properly.