DESIGN OF AN I/O BLOCK AND DEVELOPMENT OF A SIGNAL FLOW INDICATOR TOOL FOR THE SECOND GENERATION MULTI-TECHNOLOGY FPGA (MT-FPGA)
Raghav Swaminathan · OhioLink ETD Center (Ohio Library and Information Network) · 2006
A mixed technology FPGA (MT-FPGA) extends the positive aspects of conventional FPGAs into the non-conventional technologies like photonic, MEMS and RF systems.The results obtained from the MT-FPGA architecture proposed in [4] showed that by proper integration of the non-conventional technologies with the programmable FPGA architecture, the benefits associated with conventional FPGAs could be extended to the development of mixed-technology systems.The four principal components of the MT-FPGA are the multi-technology logic cluster (MTLC), the multi-technology block (MTB), the switch block and the I/O block.In this thesis, we are concerned the development of a second generation I/O module for the MT-FPGA.An attempt has been made to design the new I/O with increased flexibility when compared to the first generation I/O module.Also a number of novel features like dedicated clocks for signal sampling, unity gain analog buffers for processing analog signals and tri-state inverters at the I/O output have been incorporated in the second generation I/O.This I/O module has been incorporated in the design of the second generation MT-FPGA which has been fabricated using TSMC 0.25 µm deep sub-micron process technology.The results obtained by testing the I/O module in coordination with the other MT-FPGA components have been summarized.Also, as part of this thesis, we have developed a signal flow indicator tool to predict the direction of signal flow within the second generation MT-FPGA.This tool also reports any programming errors present in a particular bit-stream configuration.The results obtained by running this tool against many benchmarks are also summarized.