Efficient VLSI Architectures for Algebraic Soft-decision Decoding of Reed-Solomon Codes
Jiangli Zhu · OhioLink ETD Center (Ohio Library and Information Network) · 2011
JIANGLI ZHU Algebraic soft-decision decoding (ASD) algorithms of Reed-Solomon (RS) codes have attracted much interest due to their significant coding gain and polynomial complexity.Practical ASD algorithms include the Koetter-Vardy, low-complexity Chase (LCC) and bit-level generalized minimum distance (BGMD) decodings.This thesis focuses on the design of efficient VLSI architectures for ASD decoders.When applied to a (255, 239) code, our re-encoder can achieve 82% higher throughput than the previous design with 11% less area.With minor modifications, the proposed design can also be used to implement erasure decoder.After applying available complexity-reducing techniques, complexity comparisons for three practical ASD decoders were carried out.It is derived that the LCC decoder can achieve similar or higher coding gain with lower complexity for high-rate codes.This thesis also provides discussions on how the hardware complexities of ASD decoders change with codeword length, code rate and other parameters.xv