A Perspective from Exploiting Heterogeneity on Networks-on-Chip Based on Dark Silicon Mitigation
Juan Fang, Min Cai, Zhenyu Leng, Sitong Liu · 2016
Dark silicon leads the integration development of multi-core chip to a standstill, which is mainly due to on-chip power constraints. NoC power occupies a significant portion of system power. Therefore, reducing the NoC power can reduce the dark silicon degree and reduce the performance degradation caused by the dark silicon. In this paper, we firstly analyzed the NoC power variation on the dark silicon degree, which has not been done before, and proposed a heterogeneous NoC scheme to reduce the dark silicon degree. By evaluating the power of homogeneous NoCs and heterogeneous NoCs separately under different power budgets, we verified that when NoCs adopt this heterogeneous scheme, most of the workloads would get one more core power saving from the dark silicon. In other words, at least one more core could be lighted on and the dark silicon degree can be reduced.