Function Optimization Using Genetic Algorithm By VHDL
D.C. Dhubkarya, Deepak Nagariya, Jay Kumar · Global Journal of Computer Science and Technology · 2010
This paper presents the work regarding the synthesis and implementation of a hardware genetic algorithm utilizing very high speed integrated circuit hardware description language (VHDL) for programming FPGAs. Genetic Algorithms were invented to mimic some of the processes observed in natural evolution. The idea with GA is to use this power of evolution to solve optimization problems. They are based on the principles of the evolution via natural selection, employing a population of individuals that undergo selection in the presence of variation-inducing operators such as mutation and recombination (crossover). we solved the problem with the help of hardware description language so it’s take less time to find a result as compare to GA’s because of HDL solve the problem by parallel processing. The present work deals with implementation and optimization of De jong’s first function. Genetic algorithms need large memory banks to store the intermediate results and this has made the hardware implementation of GAs very inefficient but by using FPGA our task become simpler. Field-Programmable Gate Arrays (FPGAs) are flexible circuits that can be easily reconfigured by the designer. The program is written in VHDL and compiled with 32-Bit Microsoft Windows and implemented on a Spartan-3A FPGA from Xilinx.