TEST FREQUENCY SELECTION FOR ANALOG CIRCUITS BASED ON BODE DIAGRAMS AND EQUIVALENT FAULT GROUPING
Ming Li · OhioLink ETD Center (Ohio Library and Information Network) · 2004
With recent advances in semiconductor technologies and the growing need for telecommunications, network appliances and automotive electronics, the design and use of mixed-signal devices are very widespread.Digital and analog components are integrated on a single chip in order to improve performance and to reduce board size and cost.In the production of mixed-signal circuits, test is a limiting factor, contributing significantly to manufacturing cost.While digital ATPG techniques have become mature and cost-effective, testing analog parts and the combined system is less well understood and test sets are typically based on a designer's experience and the circuit specification.Attempts have been made in the analog circuit ATPG area especially in the past ten years and have met some degree of success.But, there is still no widely accepted ATPG technique for analog circuit test so far.In this thesis, we review recent developments in this area and then present a novel test frequency selection technique for frequency-based analog circuit testing.The proposed method is based on the symbolic transfer function of the circuit under test, and estimates the good and faulty circuit responses.This is achieved by asymptotic approximation for the Bode diagrams of both good and faulty circuit transfer functions.Then, we search a frequency to maximize the fault effect using a simple maximum-value-search algorithm for a set of straight lines, instead of searching the entire frequency range to find a maximum value of a non-linear function.This drastically reduces the computation complexity.An equivalent fault grouping method is also proposed to classify a list of faults into equivalent groups by pure symbolic and partial symbolic transfer function analyses before test generation.Hence, test generation is only necessary to be perform on one representative fault from each equivalent group, instead of all, without changing the fault coverage.Integrate both techniques with a test set compaction technique, a complete and efficient ATPG system can thus be developed.The ultimate test patterns generated are also applicable to analog built-in self-test, when combined with limited amount of hardware.I wish to express my sincere thanks to my advisor, Dr. Wen-Ben Jone, for the guidance and constructive criticism that he provided throughout my work.He was always ready to provide his guidance and help in solving problems, even during weekends.This work would never have taken this form