LIGHTWEIGHT IMPLEMENTATION OF THE POSIX THREADS API FOR AN ON-CHIP MIPS MULTIPROCESSOR WITH VCI INTERCONNECT A Micro-Kernel with standard API for SoCs with generic interconnects
Frédéric Pétrol, Pascal Gomez, D. Hommais · 2003
This paper relates our experience in designing from scratch a multi-threaded kernel for a MIPS R3000 on-chip multiprocessor. We briefly present the target architecture build around an interconnect compliant with the Virtual Chip Interconnect (VCI)‚ and the CPU characteris- tics. Then we focus on the implementation of part of the POSIX 1003.1b and 1003.1c stan- dards. We conclude this case study by simulation results obtained by cycle true simulation of an MJPEG video decoder application on the multiprocessor‚ using several scheduler organiza- tions and architectural parameters.