Fault simulation for stuck-open faults in CMOS combinational circuits
Lang Su · OhioLink ETD Center (Ohio Library and Information Network) · 1993
The circuIt has 2 input.*Creat the test pattern generator (LFSR): --What is the degree of primitive polynomial p(x):2 --Please input a primitive polynomial p(x) of degree 2 210 --Please input a monic polynomial g(x) of degree:O o --How many clock cycles (test pattern applied):4 *Test pattern pairs, ~ault free responses, *and number of SOP faults detected by each test pair: * Name of circuit: c17.isc