Intelligent preprocessing for neural networks in the H1 experiment
Jean-Christophe Prévotet · AIP conference proceedings · 2001
After the upgrade of the HERA machine at DESY in 2001, an increase in the luminosity of a factor 5 is expected. Since the data output rate of the L2 trigger should be kept at the pre-upgrade level, a smarter way of preprocessing data has been developed, extracting the most physically relevant information in order to optimize the neural networks. We describe here the new neural preprocessor DDB2 (Data Distributed Board) and focus especially on the algorithmic principles. A general overview of the hardware implementations of such algorithms is then discussed, notably the use of the current, fast FPGA technology to combine parallelism and speed.