A novel architecture of bidirectional NoC router using flexible buffer
S Shermi, C S Arun · 2016
NoC router provides efficient routing operation in the SoC board. It produces more delay to find the priority, which comes from various input channels and more area is consumed in unidirectional router. Also if any path failure occurs, it cannot route the data through other output channel. To address this problem, a novel bidirectional NoC router with and without contention is proposed, which offers less area and high speed than the existing unidirectional router. The proposed bidirectional router can route the data from any input channel to each and every output channel. So it avoids path failure problems and conflict situation and it supports runtime reconfiguration of channel direction using channel direction control (CDC) protocol. In conventional bidirectional NoC architecture, large buffer is needed to accommodate heavy traffic. The buffers play a major role in the performance of NoC routers and they are also major consumers of area and power. So here we are using a flexible buffer architecture which minimizes the buffering requirements without sacrificing performance by taking the advantage of virtual channels. The architecture is modelled using VHDL in Xilinx ISE Design Suite 13.2.