Variability mapping at runtime using the PAnDA multi-reconfigurable architecture
Simon J. Bale, James Alfred Walker, Martin A. Trefzer, Andy M. Tyrrell · 2017
This paper describes a novel multi-reconfigurable architecture, which allows variability-aware design, rapid prototyping and post-fabrication optimisation of digital systems. This is achieved by exploiting reconfiguration at both the digital function level and the transistor level. A runtime variability map of the architecture, created using ring oscillators, is presented.