Design and Implementation of VLSI Architecture for Mixed Radix FFT
Y. Padma Sai, Y. Swetha Sree · 2012
The main objective of this paper is to design and implement the VLSI architecture for Mixed Radix FFT. This architecture is proposed for memory based Fast Fourier transform (FFT) to support less memory size and area reduction .The pipelined architecture would cost more area and power than memory based architecture.