Design and implementation of 64 bit VLIW microprocessor on 20nm and 28nm technologies
Aishwarya Verma, Karan Jain, Anu Mehra, Nidhi Gaur · 2016
This paper presents the design and implementation of a 64-bit VLIW microprocessor. It discusses the concept, traits, principle and structure of this 64-bit VLIW microprocessor to facilitate its design. This paper first discusses the architectural specifications of the microprocessor and the 16 kinds of operational functions it facilitates. It then examines the implementation of the whole VLIW microprocessor on Xilinx Virtex Ultrascale FPGA, xcvu095-ffva2014-2-e-es2, a 20nm device and Xilinx Virtex-7 FPGA, xc7vx690tffg1761-2, a 28nm device. Finally, a comparison is made between these implementations on the basis of power and delay parameters. The design is simulated, synthesized and implemented with the help of Xilinx Vivado 2015.4 using Verilog HDL.