Adapting processor architectures for the periphery of the IoT nervous system
Paul G. Flikkema, Bertrand Cambou · 2016
We argue that the processor microarchitectures of today's microcontrollers are poorly matched to the computational workloads of IoT edge nodes, where largely independent chains of processes manage a dynamic mixture of periodic and sporadic tasks that must be executed in real time. Hardware support of priorities for some tasks and software support of priorities for others impedes efficient, correct design, and a single, monolithic ALU is a bottleneck for the diverse, asynchronous computational demands of these workloads. We describe a new processor microarchitecture with hardware support of unified fine-scale priorities for all processes, and with a dispatch-issue-execute pipeline supporting process-level parallelism. The datapath includes multiple functional units, enabling parallel processing via dynamic matching of resources to demand. The set of functional units includes computational assets that reflect the needs of IoT nodes, including a crypto-primitive generation engine.