FPGA based efficient Elliptic curve cryptosystem processor for NIST 256 prime field
N Shylashree, V.G. Sridhar, Deepthi Patawardhan · 2016
In this work, we propose a very efficient Elliptic curve cryptosystem processor for NIST 256 prime field. The proposed crypto processor includes sub blocks to perform modular arithmetic in the finite field which are addition, subtraction, multiplication and division. The processor also includes separate modules to perform point addition and point doubling that is necessary to perform scalar multiplication which is the fundamental operation cryptography. The point multiplication operation is performed by the processor where in the coordinate system used for the representation is affine coordinate system. The affine coordinates are represented by NIST recommended p256 bit prime field. In ECC the basic operation is scalar multiplication. The time to compute scalar multiplication output is one of the factors that impacts the processor efficiency. The proposed architecture for performing 256 bit scalar multiplication can be implemented with a maximum frequency of 35.785MHz and completes the operation in 4.99ms. The results are implemented on virtex 5 FPGA.