A novel assertion-based CAD tool for automatic extraction of functional coverage
Abdelrahman G. Abubakr, Hatem El-Kharashy, Ahmed El-Yamany, Sameh El-Ashry, Khaled Salah · 2016
Over the past decade, the increasing hardware design complexity uncovered the necessity for a justified and complete functional verification process. The implementation of a fast and reliable verification environment is both challenging and time-consuming. Accordingly, running the verification process in parallel with the design is a must as it also reduces the pressure of the time-to-market problem. Nowadays, one of the most important parameters the industry seeks in any verification process is the coverage closure, since it indicates when the verification process can stop. This paper proposes a new functional coverage environment based on regression tests and assertions for protocol checking and coverage of complex sequences, justified and tested with a novel CAD tool. The environment and the tool offer a variety of optimized features through a GUI interface that even designers might find it handy to assist in any long verification process required.