Testable reversible latch in molecular quantum dot cellular automata framework
Debajyoty Banik, Jimson Mathew, Hafizur Rahamant · 2016
Demand of reversible logic has increased due to their ultra-low power consumption. Reversible sequential circuits are going to be very demanding unit to design memory block of various computing engine for its extreme less power expenditure. In this work, primary focus is to optimize circuit area, garbage output, and delay to introduce testable feature in the reversible sequential circuit, implemented in classical gates. Sequential circuit can be trailed for stuck-at faults which are classical unidirectional without increasing the circuit area. By this methodology without changing the circuit design, testable feature is easily introduced at reversible latch. Introducing testable feature in existing reversible sequential circuit without increasing the cost metric and without changing the circuit design is propounded first time in article. Moreover, proposed methodology can be applied to any reversible or irreversible latch based on conservative logic block to make the latch testable for unidirectional stuck-at fault. Synthesis of efficient reversible logic is key ponderosity in robustly testable design of molecular QCA based logic circuits. And the molecular QCA based circuit will be more robust if it is built with multilayer approach. Thus, D latch is implemented in triple molecular quantum dot cellular automata to make it more robust and testable using proposed methodology without increasing area of the circuit to make better cost effective system. As per our knowledge, the triple testable latch using conservative building block in molecular QCA is designed for the first time also in this literature.