Extending the viability of power signature — Based IP watermarking in the SoC era
George Blanas, Haridimos T. Vergos · 2016
The power signature of an intellectual property (IP) core during its test has been proposed as a watermark that can reveal if it is used without proper authorization within a System on Chip (SoC). In this paper we show that the classic application of this method is not viable in the current SoC era. Our experimental results indicate that the core power signature would be indistinguishable in a SoC with hundreds of IP cores due to the power consumption of the rest cores that operate and/or are tested in parallel. To this end, we propose embedding ring oscillators, which are enabled at discrete time points during the testing of the core to over pronounce its power signature. Our experimental results indicate that in this way cores can be identified more efficiently.