A limited scalable MIN FAT TREE topology based on fully grouped routing strategy for network — On — Chip
Abhijit Biswas, Md. Anwar Hussain · 2016
The efficiency of a System - On - Chip (SoC) depends upon the arrangement of different components on the chip. In order to get full operational capability, the communication between these components must incur less cost: latency and delay. Traditionally these components are connected via shared bus, which becomes a bottleneck. To overcome this bottleneck a new era has begun called the Network - on - chip era, which advocates of placing a well formed network within a chip so that, scalability, latency etc. incurred in communication may be minimized and an optimal performance may be guaranteed. This paper examines a new MIN based FAT TREE topology which has limited scalability and the routing is based on fully grouped strategy.