Increased CMOS IC stuck-at fault coverage with reduced I DDQ test sets.
Ronald R. Fritzemeier, Jerry M. Soden, R.K. Treece, Charles F. Hawkins · International Test Conference · 1990
Simplified ATPG and fault simulation algorithms, reduced test set sizes, and increased fault coverage are achieved with I, testing for stuck-at faults. In addition, IDm testing will detect logically redundant and multiple stuck-at faults and improve the detection of non-stuck-at fault defects.