Automated Detection of Fault Sensitive Locations for Reconfiguration Attacks on Programmable Logic

Heiko Lohrke, Philipp Scholz, Christian Boit, Shahin Tajik, Jean‐Pierre Seifert · Proceedings - International Symposium for Testing and Failure Analysis · 2016

Abstract Programmable logics, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs), are widely used in security applications. In these applications cryptographic ciphers, physically unclonable functions (PUFs) and other security primitives are implemented on such platforms. These security primitives can be the target of fault injection attacks. One of the most powerful examples of fault injection techniques is laser fault injection (LFI), which can induce permanent or transient faults into the configuration memories of programmable logic. However, localization of fault sensitive locations on the chip requires reverse-engineering of the utilized building blocks, and therefore, is a tedious task. In this work, we propose an automated technique using readily available IC debug tools to map and profile the fault sensitive locations of programmable logic devices in a short period.

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