Analysis of an Asynchronously Generated Race Condition
Clifford Howard, Kris Dickson, Kent Erington · Proceedings - International Symposium for Testing and Failure Analysis · 2016
Abstract An asynchronous Low Voltage Detect (LVD) interrupt during the self-test portion of the reset sequence of a microcontroller randomly caused a corrupted clock state that was not recoverable except through a power on reset, or POR. This paper discusses the techniques used to overcome the many obstacles encountered to determine the root cause of the race condition that corrupted the clock state machine registers.