Design issues for accurate and reliable arithmetic
Michael Schulte, James E. Stine · 2000
The use of floating-point data types in high-level languages is prevalent in many of today's scientific applications. However, the approximation of real numbers by finite precision floating-point numbers can produce inaccurate results due to round off error and catastrophic cancellation. Interval arithmetic provides a method for monitoring errors in numerical computations, and can provide solutions to problems that cannot be efficiently solved with traditional floating point arithmetic. Although several software tools for interval arithmetic have been developed, these tools have severe performance limitations due to a lack of hardware support for interval arithmetic. This dissertation investigates the design, development, and evaluation of hardware and instruction set support for interval arithmetic. In contrast to previous research, which employed dedicated functional units and coprocessors for interval arithmetic, this research focuses on the integration of interval arithmetic support with traditional IEEE floating point hardware. Novel algorithms and hardware designs for interval arithmetic are developed, and methods for adding interval arithmetic instructions to the instruction set architectures of conventional processors are presented. To evaluate the cost and performance of this approach, hardware designs with support for interval arithmetic have been realized using VHDL and synthesized with the Leonardo/Spectrum tool set from Exemplar. These designs are compared to conventional floating point units in terms of area and delay. Simulations of interval benchmarks both with and without interval hardware support are performed using an interval-enhanced version of the SimpleScalar tool suite and GNU's gcc compiler. The results of these simulations indicate that the proposed hardware support for interval arithmetic improves the execution time of interval operations by a factor 6.3 to 14.9.