Low latency IFFT design for 3GPP LTE
Yeonjin Kim, Zheyan Piao, Jin-Gyun Chung, In-Gul Jang, Kyung-Ju Cho · 2016
In this paper, a low latency IFFT architecture for 3rdGeneration Partnership Project (3GPP) LTE is proposed. To reduce the latency, we reorder the IFFT input data. By using the reordered input data, both the latency and the memory in stage 1 are significantly reduced. Simulation results show that the latency for 2048-point IFFT is reduced about 42% compared with conventional architecture. The proposed architecture was verified using Altera Modelsim.