Design and test of a 2-Gbit/s GaAs 16/8-bit MUX/DEMUX pair
B. Cheney, P. Hamilton, G. LaRue · IEEE Journal of Solid-State Circuits · 1989
A 16/8-b multiplexer/demultiplexer (MUX/DEMUX) pair designed with a GaAs standard cell approach is presented here. The designs feature ECL compatibility and can support data rates up to 2 Gb/s. In addition to reviewing the design aspects of these devices, the development of a high-speed production test system is presented. The devices presented perform parallel/serial and serial/parallel conversion continuously (time-division multiplexing/demultiplexing) at rates up to 2 Gbs/s. A rigorous testing technique using a long pseudorandom bit steam sequence (2/sup 23/-1) and exercising all channels simultaneously is utilized.>