FPGA based implementation of BPSK and QPSK modulators using address reverse accumulators
Amean Al-Safi, Bradley J. Bazuin · 2016
Implementation of digital modulators on Field Programmable Gate Array (FPGA) is a research area that has received great attention recently. Most of the research has focused on the implementation of simple digital modulators on FPGAs such as Amplitude Shift Keying (ASK), Frequency Shift Keying (FSK), and Phase Shift Keying (PSK). This paper presented a novel method of implementing Quadrature Phase Shift Keying (QPSK) along with Binary PSK (BPSK) using accumulators with a reverse addressing technique. The implementation of the BPSK modulator required two sinusoidal signals with 180-degree phase shift. The first signal was obtained using Look Up Table(LUT) based on Direct Digital Synthesizer (DDS) technique. The second signal was obtained by using the same LUT but after inverting the most significant bit of the accumulator to get the out of phase signal. For the QPSK modulator, four sinusoidal waves were needed. Using only one LUT, these waves were obtained. The first two wave were generated by using two accumulators working on the rising edge and the falling edge of a perfect twice frequency square wave clock which results in a 90-degree phase shift. The other waves were obtained from the same accumulators after reversing the most significant bit in each one. The implementation of the entire systems was done in the Very high speed integrated circuit Hardware Description Language (VHDL) without the help of Xilinx System Generator or DSP Builder tools as many papers did.