Source-level Debugging Framework Design for FPGA High-level Synthesis
Nazanin Calagar Darounkola · TSpace (University of Toronto) · 2014
HighLevel Synthesis tools have become more attractive in recent years. However, in order to be fully utilized for largescale applications, HLS tools need to address more challenges in different areas of development. This thesis focuses on one of the most crucial aspects of the normal design process which is sorely lacking in HLS tools: debugging methodologies; and presents a new source-level debugger called