Automating the design of asynchronous sequential logic circuits
S.-F. Wu, P.D. Fisher · 2002
The proposed CAD process simplifies the task of designing asynchronous sequential logic circuits (ASLCs). It provides a highly structured, interactive approach for modeling ASLCs and for mapping these models into architectures and gate-level circuits. This task-oriented system provides a convenient way to describe the design specification. It can also be used to facilitate the investigation of alternative ASLC architectures for purposes of optimizing a given design.>